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ADT7473
Fan Startup Timeout
To prevent the generation of false interrupts as a fan spins
up (because it is below running speed), the ADT7473/
ADT7473 ? 1 includes a fan startup timeout function. During
Table 40. PWM FREQUENCY REGISTERS
(REG. 0X5F TO 0X61)
Bit Mnemonic Description
this time, the ADT7473/ADT7473 ? 1 looks for two TACH
pulses. If two TACH pulses are not detected, an interrupt is
generated. Using Configuration Register 1 (0x40), Bit 5
(FSPDIS), this functionality can be changed (see the
Disabling Fan Startup Timeout section).
Table 38. PWM1 TO PWM3 CONFIGURATION
<2:0>
FREQ
000 = 11.0 Hz
001 = 14.7 Hz
010 = 22.1 Hz
011 = 29.4 Hz
100 = 35.3 Hz (Default)
101 = 44.1 Hz
110 = 58.8 Hz
111 = 88.2 Hz
(REG. 0X5C TO 0X5E)
Fan Speed Control
Bit
<2:0>
Mnemonic
SPIN
Description
These bits control the startup
timeout for PWM1 (0x5C),
PWM2 (0x5D), PWM3 (0x5E).
000 = No Startup Timeout
001 = 100 ms
010 = 250 ms (Default)
011 = 400 ms
100 = 667 ms
101 = 1 s
110 = 2 s
111 = 4 s
The ADT7473/ADT7473 ? 1 controls fan speed using
automatic and manual modes.
In automatic fan speed control mode, fan speed is
automatically varied with temperature and without CPU
intervention, once initial parameters are set up. The
advantage of this is that, if the system hangs, the user is
guaranteed the system is protected from overheating. The
automatic fan speed control incorporates a feature called
dynamic T MIN calibration. This feature reduces the design
effort required to program the automatic fan speed control
Disabling Fan Startup Timeout
Although fan startup makes fan spin-ups much quieter
than fixed-time spin-ups, the option exists to use fixed
spin-up times. Setting Bit 5 (FSPDIS) to 1 in Configuration
Register 1 (0x40) disables the spin-up for two TACH pulses.
Instead, the fan spins up for the fixed time as selected in
Register 0x5C to Register 0x5E.
PWM Logic State
The PWM outputs can be programmed high for a 100%
duty cycle (non-inverted) or low for a 100% duty cycle
(inverted).
loop. For more information and procedures on how to
program the automatic fan speed control loop and dynamic
T MIN calibration, see the Programming the Automatic Fan
Speed Control Loop section.
In manual fan speed control mode, the ADT7473/
ADT7473 ? 1 allows the duty cycle of any PWM output to be
manually adjusted. This can be useful if the user wants to
change fan speed in software or adjust the PWM duty cycle
output for test purposes. Bits <7:5> of Register 0x5C to
Register 0x5E (PWM configuration registers) control the
behavior of each PWM output.
Table 41. PWM CONFIGURATION
Table 39. PWM1 TO PWM3 CONFIGURATION
(REG. 0X5C TO 0X5E) BITS
(REG. 0X5C TO 0X5E) BITS
Bit Mnemonic
Description
Bit
Mnemonic
Description
<7:5>
BHVR 111
Manual Mode
4
INV
0 = logic high for 100% PWM duty cycle
1 = logic low for 100% PWM duty cycle
Once under manual control, each PWM output can be
manually updated by writing to Register 0x30 to Register
Low Frequency Mode PWM Drive Frequency
The PWM drive frequency can be adjusted for the
application. Register 0x5F to Register 0x61 configure the
PWM frequency for PWM1 to PWM3, respectively. In high
frequency mode, the PWM drive frequency is always
22.5 kHz.
High Frequency Mode PWM Drive
0x32 (PWM current duty cycle registers).
Programming the PWM Current Duty Cycle Registers
The PWM current duty cycle registers are 8-bit registers
that allow the PWM duty cycle for each output to be set
anywhere from 0% to 100% in steps of 0.39%.
The value to be programmed into the PWM MIN register is
given by:
Setting Bit 3 of Register 0x5F, 60H or 61H enables high
frequency mode for fans 1, 2 and 3.
Value (decimal) + PWM MIN 0.39
(eq. 4)
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